High-speed Zynq data acquisition board

Zynq SoC architecture: ARM + FPGA

At the heart of the platform is a Zynq SoC, which integrates an ARM processing system and FPGA programmable logic in a single device.

This architecture allows system functions to be distributed according to their performance requirements.

The dual-core ARM processor can handle communications, storage, configuration, application protocols and overall system management, while the FPGA can implement functions that require parallel processing, high speed or deterministic behaviour.

This combination makes the platform particularly well suited to data acquisition, instrumentation and real-time digital signal processing applications.

High-speed analogue acquisition

The board features 4 independent differential analogue channels designed for high-resolution signal acquisition.

Each channel offers 16-bit resolution and sampling rates of up to 1 MSPS, providing the capability to capture fast-changing signals while maintaining a wide dynamic range.

Differential inputs also provide greater noise immunity than single-ended acquisition architectures, a particularly valuable feature in industrial and instrumentation applications.

Real-time signal processing on the FPGA

One of the main advantages of the Zynq architecture is the ability to process acquired data directly in the FPGA programmable logic.

Depending on the application, digital filtering, event detection, parameter calculation, trigger generation, parallel processing or data reduction can be implemented before the information is passed to the ARM processor.

This reduces the processor load and enables acquisition chains with low latency and deterministic behaviour.

The combination of a high-speed ADC and an FPGA makes the platform a sound basis for advanced DAQ (Data Acquisition), monitoring and DSP processing systems.

Dual-core ARM processor

The processing subsystem features a dual-core ARM architecture that runs the unit's high-level software.

The processor can simultaneously manage Ethernet and serial communications, storage, system configuration, application protocols and the transfer of data processed by the FPGA.

The tight integration between ARM and FPGA allows large amounts of data to be exchanged between the two subsystems without external buses.

FreeRTOS and Linux

The platform can run FreeRTOS or Linux, so the most suitable software environment can be chosen for each application.

FreeRTOS is particularly suited to embedded applications that need deterministic behaviour, controlled response times and optimised use of resources.

Linux provides a richer environment for applications that need network services, advanced file systems, TCP/IP communications, remote administration or more complex applications.

This flexibility allows the same hardware architecture to be used across different types of product and application.

Gigabit Ethernet

The board features Gigabit Ethernet (1 GbE) communications for data transfer and integration with external systems.

This interface is especially relevant on a high-speed acquisition platform, as it transfers measurements, processed results and data blocks to computers, servers or external storage systems.

Ethernet can also be used for remote configuration, diagnostics, updates, monitoring and control of the system.

In distributed applications, the board can operate as a stand-alone acquisition and processing node connected directly to the Ethernet infrastructure.

RS232 and RS485 communications

The platform provides RS232 and RS485 communication interfaces, making it easy to integrate with instrumentation, sensors, controllers and industrial devices.

RS232 provides compatibility with equipment using conventional serial communications, while RS485 enables robust communication over longer distances and in industrial environments.

Application-specific or industrial protocols can be implemented over these interfaces where the project requires it.

GPIO digital inputs and outputs

The board features general-purpose digital inputs and outputs (GPIO) for interfacing with external devices.

These signals can be used for synchronisation, external triggers, starting acquisition processes, status signalling or peripheral control.

In advanced acquisition applications, the digital signals can be combined with the FPGA to implement low-latency hardware trigger and synchronisation mechanisms.

SD/MMC storage

The system provides SD and MMC storage for keeping acquired data, configurations, operating logs and applications locally.

Local storage is particularly useful when the board has to operate autonomously or when the volume of data generated cannot be transmitted immediately.

It also supports data logging strategies, storing acquisitions locally and transferring them later over Gigabit Ethernet.

Acquisition, processing and transmission

The architecture implements a complete data handling chain on a single platform:

1. Analogue signal
2. 16-bit ADC / 1 MSPS
3. FPGA
4. digital processing
5. ARM
6. SD/MMC storage
7. Gigabit Ethernet

This distribution processes information close to the point of acquisition and transmits only relevant or pre-processed data.

The result is a platform suited to industrial Edge Computing applications that need to combine analogue acquisition, high-speed processing and communications.

Technical specifications